Two IP announcements herald a new normal in chip world
- ICDesign
- 2023-09-23 23:01:18
Announcements of an IP acquisition deal and a substantial funding round for an analog IP reuse specialist last week underscore the critical importance of semiconductor IP at a time when more functionality is integrated into a single chip. High-quality IP reduces risk and enables chip designers to speed time-to-market.
On July 20, Thalia, an analog IP reuse specialist, announced it has secured a $2.7 million investment for its next phase of growth. Thalia claims that its proven IP-reuse solution enables system-on-chip (SoC) developers to quickly and efficiently migrate existing IP designs into the sub-20-nm nodes.
Figure 1 Thalia’s AMALIA IP platform claims to offer cost and time efficiency benefits in migrating SoC designs to new wafer fabs and process nodes.
The UK-based IP supplier also claims that its AMALIA platform has been validated on over 50 IPs, ranging from RF to baseband and power management IC (PMIC) to PLL and analog-to-digital converter (ADC). And many of these IPs are already in commercial use.
On the same day, Cadence Design Systems announced that it’s acquiring PHY IP assets of Rambus. That encompasses SerDes and memory interface PHY IPs, critical in artificial intelligence (AI), CPU architectures, data center and hyperscale applications, and networking designs. Additionally, Cadence will get hold of experienced PHY engineering teams in the United States, India, and Canada.
On the other hand, Rambus will retain its digital IP business, including memory and interface controllers and security IP. According to Sean Fan, senior VP and chief operating officer at Rambus, the company will increase its focus on AI and data center markets, which are driving ever-increasing demand for memory and security. “Rambus will expand the roadmap of novel memory solutions to support the continued evolution of the data center and AI.”
Figure 2 Cadence is steadily growing its IP offerings across vertical markets.
Here, it’s worth mentioning similar IP acquisitions that Cadence’s archrival Synopsys made a couple of years ago. In early 2020, Synopsys acquired certain IP assets of Invecas to broaden its DesignWare IP portfolio. That included logic library, general purpose I/O, embedded memory, interface, and analog IP. And Invecas retained its HDMI IP and ASIC design solutions businesses.
A couple of months earlier, Synopsys bolstered the DesignWare IP portfolio for embedded memory by acquiring eSilicon’s ternary content addressable memory (TCAM) technology and multi-port memory compilers as well as its interface IP portfolio with high-bandwidth interface (HBI) IP. The move was aimed to better serve design requirements in growing markets such as AI and cloud computing.
That clearly shows IP building blocks are steadily gaining prominence in the semiconductor design and manufacturing value chain. Especially when increasingly complex SoCs require a broad range of IPs to address stringent performance, power, and area requirements of advanced applications. Semiconductor design talent is another factor driving these acquisitions.
As Ashwin Kumaraswarmy of Mercia Ventures puts it, semiconductor chip design is a manual and painstaking process and skilled engineering teams are rare. Mercia Ventures is a major investor in Thalia.
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