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Representing the 8th generation of the Tensilica Xtensa LX processor family from Cadence, the LX8 improves system-level performance by as much as 50%. The 32-bit RISC processor IP serves as a foundation for processor and system-level designs, including DSP, multiprocessor, interconnect, and system-level IP products.

Among the LX8’s multiple enhancements is a flexible L2 memory option, which can be configured at initialization to be a fixed-address memory, L2 cache, or a combination of both. Cadence reports performance improvements of 50% or more for cache-based subsystems compared to the Xtensa LX7 processor.

Other advancements include improved branch prediction and enhanced Arm AMBA interfaces, such as AMBA 4 AXI and APB manager interface. An integrated DMA (iDMA) controller improves 3D DMA transfers found in complex DSP algorithms. The iDMA also adds compression/decompression support and expands the physically addressable memory to 40 bits. Further, the Xtensa LX8 accommodates up to 128 interrupts.

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The Tensilica Xtensa LX8 processor is currently shipping to early access customers, with general availability expected in the late third quarter of 2023.

Xtensa LX8 product page

Cadence Design Systems

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